My Profile

Education:

    My preschool education was handled by family.

    My primary education took place at Shibanarayanpur U.G.M.E School. I was the topper of my class in all standards.

    I did my secondary education at Hatadihi High School, located near to my village. I completed my schooling in 2002 with 84% of marks.

    I completed my higher secondary education from Fakir Mohan Junior College, Balasore in 2004. I studied in science stream and passed with 74% of marks in the examination conducted by Council of Higher Secondary Education, Orissa. Courses studied includes : English, Oriya, Physics, Chemistry, Mathematics and Electronics (Optional).

    After that, I went to National Institute of Science and Technology, Berhampur, Orissa to pursue bachelor's degree in Electronics and Instrumentation engineering under Biju Patnaik University of Technology (BPUT). I graduated from there in the year 2008 with a CGPA of 8.83 (nearly 88%).

    During my stint in National Institute of Science and Technology (NIST), I also attended multiple industrial training programs on VLSI design and layout, Instrumentation measurements etc.

I have completed my master's program, MTech in Microelectronics, from BITS Pilani in 2024.

Achievements:

1. Received block level scholarships in standard III and V.

2. Received state level NRTS scholarship in standard VII and OSTSE scholarship in standard X.

3. Received silver medal from NIST being the topper of the Instrumentation branch.

Some Thoughts:

    1. Education is the most powerful weapon which you can use to change the world. (Nelson Mandela)

    2. The goal of education is the advancement of knowledge and the dissemination of truth. (John F. Kennedy)

    3. Education is what remains after one has forgotten what one has learned in school. (Albert Einstein)

    By profession, I am posted as Principal Design Engineer in the field of Analog and Mixed Signal design having 16+ years of industry experience. Currently I'm employed at Aantaric Technologies Pvt. Ltd, a mixed signal semiconductor service and solution provider. My last employment was with Sankalp Semiconductor Pvt Ltd, an HCL Technologies company.

    I have started my professional career with Sankalp Semiconductor Pvt. Ltd (India) and trained on circuit layout. At Sankalp Semiconductor I was responsible for circuit design using CAD tools on LINUX platform. But my job was not restricted only to circuit design, I was involved every phase of VLSI design cycle ranging from specification derivation, behavioral modeling, circuit design, simulation, circuit layout, post layout extracted view simulation, CAD tool evaluation, in-house CAD tool development and automation to reduce cycle time etc. Apart from this, I was involved in training of new assets.

    In Aantaric Technologies, I am responsible for hands on circuit design and leading customer projects, starting from specification to GDS.

    Worked on multiple CPUMP PLLs from different Technologies and difference architecture. Wide Input range, V2I splitter, FLL based PLL, Free Running VCO Type, Programmable, SSCG Type, Fractional etc.

    Apart from technical know how's, I had organized Sankalp@5 for Sankalp East Division. I have remained part of the core organizing team of Sankalp@6 and Sankalp@7. By the way, Sankalp@5 means 5th annual day celebration of Sankalp Semiconductor. I have learned a lot on people management, working with vendors, budgeting of the expenditures and many more. I am part of the site event team, that organizes multiple events for assets round the year.

    Worked on development of a wrapper for Power EM analysis. The wrapper includes Assura LVS check, Assura QRC (RCX) resistor extraction, extracted view simulation and VPS EM analysis tools. In most of the cases, the code generates the required schematic test-bench to reduce verification time.

    Generally, in analog designs, we have to design amplifiers with different specifications many a time. I have also worked on to automate amplifier design flow, so that from the device characterization results of a particular technology and few input parameters, the required amplifier can be designed with minimal simulation requirement and minimal designer intervention. The final result of the automation will be a design in a schematic view. Though I have not done the automation fully myself, I have set the standard of the automation flow.

Present Work:

    At present, I am working on an eFuse chip design.

Technical Skills:

Modeling / Programming Language: C, C++, VHDL, Verilog, Verilog-A, Skill, Perl, Python, Shell

Operating System: Windows XP, Red-Hat LINUX

Technology: Sub-micron CMOS technologies

Tool Expertise : Virtuoso Schematic, Layout, Layout XL Editor, ADE-L, ADE-XL, Spectre, Ocean, Assura Verification Flow(DRC/LVS/RCX), Hercules Verification flow (DRC/LVS), Laker ADP, Laker L2/L3, Tanner EDA : S-edit, L-edit, T-spice, W-edit, Mentor Graphics ICSTUDIO.

Area of Expertise: PLL, VCO, Frequency Dividers, Precision Sine Oscillators, Amplifiers

Achievements:

Nominated as Divisional Innovation Champion for the month of December 2009 and automation champion in April 2012.

Participated in Sankalp Technical Conference (STC) 2011 and presented on the topic "A novel bias scheme for wide range CMOS VCO."

Paper in STC-2012 on "A Precision Sine Wave Oscillator with Excellent Amplitude and Frequency Stability and Low Distortion"

Paper on "A wide range CMOS VCO for PLL applications", submitted in 26th International Conference on VLSI Design 2013. IEEE

    I have great passion towards nature and heritage sites. I have visited some of these places. I am passionate about keeping memories of each tour I make. So I always go with my Digital camera and try to capture as much eye pleasant picture as I can.